DFI LANParty UT P35-T2R

[wildabeast]

I have seen over at Xtremesystems people talkin this board up real well. I myself am interested in getting it myself for it looks awesome, and looks to overclock very well. It also looks fun to deal with. Still I have not seen anybody give any real details of any pitfalls on this board. So I was wondering if anyone here has dealt with the board? It is very pricey so I want to get some real homework done before I go out and buy it. Do you guys think it is worth the price, or just wait to see what the X38 will brings?

[freecableguy]

We'll be revealing an overclocking guide for this board this week. In any case, I wouldn't recommend waiting for the X38 unless you plan on waiting at least 90 days or more. :)

[wildabeast]

I just heard my bank account curse you FCG.:D I think I will have to pick one of these up soon then. Time to get in line at one of these retailers. I cannot wait to read your guide by the way. Also thanks for the quick answer.

[Tony]

beating on the board now, its quite the animal with ram clocking much like it was on 939 now brought to P35 Intel

Nice to have all the tweaks right in bios also, I wish Asus would take note and give us the same on their boards

[wildabeast]

Pay day is tomorrow for me. So I'm getting in line for this beast. I loved my 939 NF4 SLI-DR. I gave it to my nephew and he is still beating that beast everyday. That was a great board to tweak. Is the P35-T2R need to be tweaked very much just to get started out the gate? Is it going to need to be tweaked per ram chip? It has been a while since I had a board with tons of options. I have been using and killing a EVGA 680i SLI board for a little while. I hope the P35-T2R is build to take more of a beating that this EVGA. This has been my second 680i board which soon maybe my third.:rolleyes: USB's are getting all wacky on it. I also think I'm ready to go back to a Intel chipset. Once I get mine in I'll post anything if you want me to try. Even though I'm pretty sure you guys are all over it. I cannot wait to see your guys guide on this board.

[Tony]

It does well with Auto's but does repsond well to tweaks as well. I have tested to 525fsb stock board cooling and cpu on 12c water but no higher...seems there is a trick im missing at this time for higher.

[eva2000]

It does well with Auto's but does repsond well to tweaks as well. I have tested to 525fsb stock board cooling and cpu on 12c water but no higher...seems there is a trick im missing at this time for higher.

yes pretty good at AUTO values..

here's DFI LP UT P35-T2R with 8/10 bios

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6750_1/corsair/10000c5d/8x/533/EDT_EAfast_450-450_4449_4-30-7-AA-11-10-3-8-8-6-5-3-4_1.4625-2.1-1.07-1.55-1.33-1.2-3.45-sw-clkfd1311/e6750_8x450fsb_dfi_p35_1.png (http://i4memory.com/showpost.php?p=72296&postcount=6)

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6750_1/corsair/10000c5d/8x/533/EDT_EAfast_450-450_4449_4-30-7-AA-11-10-3-8-8-6-5-3-4_1.4625-2.1-1.07-1.55-1.33-1.2-3.45-sw-clkfd1311/e6750_8x450fsb_dfi_p35_superpi32m.png (http://i4memory.com/showpost.php?p=72296&postcount=6)

[thorgal]

Great post Eva. just can't wait to get mine. Will try and give some numbers here too, compare with Asus blitz.

[freecableguy]

ohh, I really like how those comparison graphs include total memory subsystem latency....that's exactly what I want to explore in one of my future articles.

BTW, my DFI LP P35 showed up yesterday but I've been so busy that I didn't have time to get to it. I'll probably start working with it beginning Saturday or so...

-FCG

[wildabeast]

I put my money down on one of these bad boys. Wow look at all the info so far. I cannot wait to look at this board in person. Lots of graphs. I like, I like.:D

[Raja]

should have mine this week hopefully, so will upload some stuff here if I can..

regards
Raja

[Tony]

Highest FSB for me is 525 with a X6800, not anywhere as near as high as I had hoped but there is some light at the end of the tunnel...GTL voltages ;)
I found dual cores need tweaking just like the quads, so i may be able to push another 20fsb or so onto this max.

600fsb needs the CPU being chilled, so while the board is capable or running the CPU's that high you need to enhance the CPU to get it there...so come on Intel give us CPU's that will do 2400FSB+ ;)

Will be publishing results next week with the board and various memory kits and helping Kris with a tweak guide.
Only issue is DFI are still working on bios files, 815 seemed not so good with a few testers reporting this back to DFI so what ever is published may have to be updated as the bios files are released.

[eva2000]

Yeah fsb no where as high as Oskar's heh. Maybe might wait for more bios releases before finalising the guide ? i've only used 8/10 bios and no others so not sure how much diff it makes

DFI LP UT P35-T2R: Max FSB E6750 G0 ES

Looking at MAX FSB. My E6750 on Asus P5K Deluxe maxed out at 495-500FSB with CPU PLL 1.8v voltage. I suspect this is a cpu FSB wall as it's pretty much the same on DFI LP UT P35-T2R maxing out FSB around 495-500FSB but needing CPU PLL 1.95v since next option below it was 1.75v with clockgen voltage at 3.75v. I could boot into memtest86+ v1.70 at 506FSB but it would hang in test #7 (which might be a good test for max FSB for cpus ? ).

System

Intel Core 2 Duo E6750 ES - L710A438 G0
Scythe Infinity with modded mount (http://i4memory.com/reviewimages/motherboards/dfi/LP_UT_P35_T2R/1/photos/DFI_UT_P35_T2R_83.html) + 120x25mm Spire 96cfm fan
Transpiper heatsink NOT installed
DFI LP UT P35-T2R 8/10 bios flashed from 7/27
128MB Gainward FX5200 PCI
2GB Crucial Ballistix Tracer PC2-8500 naked modules Green dimm slots
80GB Hitachi 7K80 SATA
LiteON CD-RW
700W OCZ GameXStream
WinXP Pro SP2


7x500FSB 1:1

Single Super Pi 32M needed 2.19v bios set vdimm but dual Super Pi 32M needed 2.27v vdimm

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6750_1/crucial/ballistix/8500t_2/7x/533/EDT_EA_fast_500-500-4449_4307-AA-1111-3-8-3-4_1.4625-1.15-1.95-1.5-1.4-3.75_clk14/spi32m_13m35s516ms.png

Half way mark for dual 32M
http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6750_1/crucial/ballistix/8500t_2/7x/533/EDT_EA_fast_500-500-4449_4307-AA-1111-3-8-3-4_1.4625-1.15-2.27-1.95-1.5-1.4-3.75_clk14/spi32m_dual_halfway.png

Dual Super Pi 32M complete
http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6750_1/crucial/ballistix/8500t_2/7x/533/EDT_EA_fast_500-500-4449_4307-AA-1111-3-8-3-4_1.4625-1.15-2.27-1.95-1.5-1.4-3.75_clk14/spi32m_dual.png

Everest Bandwidth & Cinebench R10
http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6750_1/crucial/ballistix/8500t_2/7x/533/EDT_EA_fast_500-500-4449_4307-AA-1111-3-8-3-4_1.4625-1.15-2.27-1.95-1.5-1.4-3.75_clk14/everest_bandwidth.png http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6750_1/crucial/ballistix/8500t_2/7x/533/EDT_EA_fast_500-500-4449_4307-AA-1111-3-8-3-4_1.4625-1.15-2.27-1.95-1.5-1.4-3.75_clk14/cinebenchr10_tn.png

Bios Settings Used:
CPU Feature
- Thermal Management Control: Disabled
- PPM(EIST) Mode: Disabled
- Limit CPUID MaxVal: Disabled
- CIE Function: Disabled
- Execute Disable Bit: Disabled
- Virtualization Technology: Disabled
- Core Multi-Processing: Enabled

Exist Setup Shutdown: Mode 2
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Enabled
CPU Clock Ratio: 7x
- Target CPU Clock: 3500Mhz
CPU Clock: 500FSB
Boot Up Clock: AUTO
DRAM Speed: 333MHZ/667MHZ
- Target DRAM Speed: DDR2-1001Mhz
PCIE Clock: 100Mhz

Voltage Settings
CPU VID Control: 1.4625v
CPU VID Special Add: AUTO
DRAM Voltage Control: 2.19v
SB 1.05V Voltage: 1.15v
SB Core/CPU PLL Voltage: 1.95v
NB Core Voltage: 1.50v
CPU VTT Voltage: 1.40v
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.75v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control: Disable
x CPU GTL1/3 REF Volt: 110
x CPU GTL 0/2 REF Volt: 110
x North Bridge GTL REF Volt: 110

DRAM Timing
- Enhance Data transmitting: FAST
- Enhance Addressing: FAST
- Channel 1 CLK fine delay: 14
- Channel 2 CLK fine delay: 14

(values in brackets next to AUTO is what memset sees)
CAS Latency Time (tCL): 4
RAS# to CAS# Delay (tRCD): 4
RAS# Precharge (tRP): 4
Precharge Delay (tRAS): 9
All Precharge to Act: 4
REF to ACT Delay (tRFC): 30
Performance Level: 7
Read delay phase adjust: AUTO
MCH ODT Latency: AUTO
Write to PRE Delay (tWR): 11
Rank Write to Read (tWTR): 11
ACT to ACT Delay (tRRD): 3
Read to Write Delay (tRDWR): 8
Ranks Write to Write (tWRWR): AUTO
Ranks Read to Read (tRDRD): AUTO
Ranks Write to Read (tWRRD): AUTO
Read CAS# Precharge (tRTP): 3
ALL PRE to Refresh: AUTO 4

PCIE Slot Config: 1X 1X
CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled

7x500FSB 5:6 divider

Notes:

With 5:6 didvider tWR and tWTR actually show same values in memset as what's set in bios which differs from 1:1 divider where tWR and tWTR show 1 value below in memset compared to what is set in bios.


Single Super Pi 1M & 32M

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6750_1/crucial/ballistix/8500t_2/7x/5_6divider/EDT_EA_fast_500-600-5549_4307-AA-1111-3-8-3-4_1.4375-1.15-2.27-1.95-1.53-1.4-3.75_clk14/spi1m_14s296ms.png

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6750_1/crucial/ballistix/8500t_2/7x/5_6divider/EDT_EA_fast_500-600-5549_4307-AA-1111-3-8-3-4_1.4375-1.15-2.27-1.95-1.53-1.4-3.75_clk14/spi32m_13m28s531ms.png

Half way mark for dual 32M
http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6750_1/crucial/ballistix/8500t_2/7x/5_6divider/EDT_EA_fast_500-600-5549_4307-AA-1111-3-8-3-4_1.4375-1.15-2.27-1.95-1.53-1.4-3.75_clk14/spi32m_dual32m_halfway.png

Dual Super Pi 32M complete
http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6750_1/crucial/ballistix/8500t_2/7x/5_6divider/EDT_EA_fast_500-600-5549_4307-AA-1111-3-8-3-4_1.4375-1.15-2.27-1.95-1.53-1.4-3.75_clk14/spi32m_dual.png

Everest Bandwidth & Cinebench R10
http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6750_1/crucial/ballistix/8500t_2/7x/5_6divider/EDT_EA_fast_500-600-5549_4307-AA-1111-3-8-3-4_1.4375-1.15-2.27-1.95-1.53-1.4-3.75_clk14/everest_bandwidth.png http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6750_1/crucial/ballistix/8500t_2/7x/5_6divider/EDT_EA_fast_500-600-5549_4307-AA-1111-3-8-3-4_1.4375-1.15-2.27-1.95-1.53-1.4-3.75_clk14/cinebenchr10_tn.png

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6750_1/crucial/ballistix/8500t_2/7x/5_6divider/EDT_EA_fast_500-600-5549_4307-AA-1111-3-8-3-4_1.4375-1.15-2.27-1.95-1.53-1.4-3.75_clk14/cpuz_validated.png

Bios Settings Used:
CPU Feature
- Thermal Management Control: Disabled
- PPM(EIST) Mode: Disabled
- Limit CPUID MaxVal: Disabled
- CIE Function: Disabled
- Execute Disable Bit: Disabled
- Virtualization Technology: Disabled
- Core Multi-Processing: Enabled

Exist Setup Shutdown: Mode 2
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Enabled
CPU Clock Ratio: 7x
- Target CPU Clock: 3500Mhz
CPU Clock: 500FSB
Boot Up Clock: AUTO
DRAM Speed: 266MHZ/667MHZ
- Target DRAM Speed: DDR2-1201Mhz
PCIE Clock: 100Mhz

Voltage Settings
CPU VID Control: 1.4375v
CPU VID Special Add: AUTO
DRAM Voltage Control: 2.27v
SB 1.05V Voltage: 1.15v
SB Core/CPU PLL Voltage: 1.95v
NB Core Voltage: 1.53v
CPU VTT Voltage: 1.40v
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.75v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control: Disable
x CPU GTL1/3 REF Volt: 110
x CPU GTL 0/2 REF Volt: 110
x North Bridge GTL REF Volt: 110

DRAM Timing
- Enhance Data transmitting: FAST
- Enhance Addressing: FAST
- Channel 1 CLK fine delay: 14
- Channel 2 CLK fine delay: 14

(values in brackets next to AUTO is what memset sees)
CAS Latency Time (tCL): 5
RAS# to CAS# Delay (tRCD): 5
RAS# Precharge (tRP): 4
Precharge Delay (tRAS): 9
All Precharge to Act: 4
REF to ACT Delay (tRFC): 30
Performance Level: 7
Read delay phase adjust: AUTO
MCH ODT Latency: AUTO
Write to PRE Delay (tWR): 11
Rank Write to Read (tWTR): 11
ACT to ACT Delay (tRRD): 3
Read to Write Delay (tRDWR): 8
Ranks Write to Write (tWRWR): AUTO
Ranks Read to Read (tRDRD): AUTO
Ranks Write to Read (tWRRD): AUTO
Read CAS# Precharge (tRTP): 3
ALL PRE to Refresh: AUTO 4

PCIE Slot Config: 1X 1X
CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled

[thorgal]

Anyone test quad cores yet ? Just finished quad prime >1h on Blitz Formula with 480x6, QX6700. This is the absolute max though, no luck going to 485, not even 1min prime. I wonder if the DFI can pull this as well ?

(Have to run some tests for the review now, and get to Dual core next week. After that it's DFI P35 time)

[wildabeast]

Mine does not ship till the 8/22. I will be using a new Q6600 G0 stepping. So I will give my best shot with this board. Then I report back.

[Tony]

George

Drop VTT and push up GTL voltages and see how you do, I was able to gain 30fsb on the 6750 by doing this from 470 to 500 so you may see gains above 500 by doing this then playing with the VTT.

[Praz]

It was rough going but finally nailed 550FSB on air. Because of high ambients 6x multi had to be used. 7x was to much for the cpu. Board/chipset localized temperatures play a big role in running high FSB. It will require an exceptional chipset along with an above average processor to run anywhere near 600 on air.

All memory settings were left on Auto. Will post performance tuning later. CPU PLL voltage is the key along with GTL when clocking the FSB close to the max. These two settings are dead on. I may be able to drop down some with the other voltages.


http://www.fileden.com/files/2007/4/28/1027440/32m500fsb.jpg



http://www.fileden.com/files/2007/4/28/1027440/main550.jpg



http://www.fileden.com/files/2007/4/28/1027440/dram1_550.jpg



http://www.fileden.com/files/2007/4/28/1027440/dram2_550.jpg



http://www.fileden.com/files/2007/4/28/1027440/voltage550.jpg

[Tony]

Praz, you dropped GTL, the one thing i have not tried yet ;)

it looks like Oskar may have overvolted the GTL by default to suit quads maybe which caused issues with dual cores.

I will be testing later today...awesome work man ;)

[freecableguy]

It looks as though GTL values were actually manually adjusted back down after raising VTT...1.33 is not a default value IIRC (default is around 1.2-1.24v depending on who you ask). Praz, can you confirm this was your line of thought?

My new build is just about complete. I've got a QX6800 G0 and 2GB of OCZ PC-9200 Reaper in my DFI LP P35 board along with an 8800 Ultra and Auzentech X-Meridian. FuZion CPU block and full-converage EK block on the videocard for cooling. First boot should be sometime in the next day or so as I still need to fill and bleed the loop and I'm not in a terrible rush on account of the new job and all. I'll be sure to get in on the conversation and bring myself up to speed pretty quickly when I do get going. :)

-FCG

[eva2000]

George

Drop VTT and push up GTL voltages and see how you do, I was able to gain 30fsb on the 6750 by doing this from 470 to 500 so you may see gains above 500 by doing this then playing with the VTT.
tried up and down GTL with all combos of VTT hasn't helped much for E6750 G0 ES.. still max 500FSB heh

guess some cpus just don't respond as well ?

[Praz]

Kris, stock VTT is 1.20V. For me VTT seems almost as touchy as GTL. Over-volting VTT appears as bad as under-volting.

As the FSB wall of the processor is reached CPU PLL Voltage is the key. If all other settings are close and Windows freezes or boots to a blank screen CPU PLL needs to be increased. Once this point is reached though there is very little FSB to be gained between the lowest and highest voltage settings.

32M stability for me required cooling the NB area of the board and adjusting GTL. 32M would fail between step 2 and 5 until I had air blowing across the NB area of the board. After that the failure would occur between steps 19 and 24 which to me still indicates a heat issue. However, adjusting the GTL voltage seems to fine tune it enough that 32M will complete.

I think the GTL scale that Oskar is using is different then in the past. With BIOS defaults loaded GTL Control is disabled and the values shown are 110. I don't think these are the actual values being used at default voltage. I think the values are more like in the 70-80 range. With the Tuniq Tower mounted though it's next to impossible to get any actual voltage measurements. So unless someone else takes readings it will have to wait till I switch to water.

[Tony]

Kris

Could you take a look and point out some measure points on the board, i will run some tests for us if needed.

[Tony]

No need Jimmy@DFI came thru for us. Its good info for the guide so i will not publish yet but I have measure points, tables and an explanation for whats happening and how etc ;)

Its all good :)

T

[eva2000]

Just got sent 8/17 bios.. anyone played with it yet ? :)

[freecableguy]

"Real life" can be so bothersome sometimes. I didn't get a thing done yesterday with my system but plan on making some progress today. All I want to do is get my loop solid and pickup the last few things I need to start testing. Hopefully today or tomorrow the guide preparation will begin.

[Tony]

Just got sent 8/17 bios.. anyone played with it yet ? :)

Not yet Eva send it over for me please.

[eva2000]

Sent :)

[Raja]

Kris, I am assuming CPU PLL voltage adjusts voltage rails to the CLOCK PLL chip, other than reducing reference clock output jitter, I can't think of what else this would do?

Descriptions within board bios's can always be deceptive, so I'm left wondering what else (if anything) they could be driving that voltage into..

regards
Raja

[freecableguy]

CPU PLL voltage is nothing more than VCC for the PLL chip that provides the reference frequency for the CPU FSB, PCI, etc. I'm not clear as to why this changes anything, although some people claim it gives them 2-5Mhz more just by maxing it out....go figure.

[Praz]

On this board increasing the PLL voltage helps with the processor FSB wall. As the wall is approached Windows freezes at the boot screen. The monitor appears blank but if the lights are turned off the Windows boot screen is just visible. Increasing PLL voltage not only allows Windows to boot but the system is stable. The downside is that not much is gained from the available voltage increase. With the processors I've tried so far there is at most 30MHz to 40MHZ gained from default to maximum PLL voltage.

[eva2000]

Yeah increasing CPU PLL on both Asus P35 and DFI P35 board helps max FSB but each cpu responds differently to CPU PLL to FSB scaling.

i.e. i'm testing 2x E6850 L723A347 retail cpus on Asus Blitz Formula

#1 - max 485-487FSB and doesn't respond much to CPU PLL upto 1.8v

#2 - max 523-525FSB at 1.5v CPU PLL and at 1.7v CPU PLL 530FSB and 1.8v CPU PLL 533-535FSB.

Both cpus on Corsair Nautilus 500 water.

For both Asus and DFI P35, try looping memtest86+ v1.70 test #7 to also test for max FSB.. it will freeze and/or not reboot on memtest86 exit if you hit an FSB wall.

[freecableguy]

The only reason question I have regarding CPU PLL voltage is in regard to maximum safe voltage. Can some on find the PLL chip and lookup the datasheet and tell us the manufacturer's recommended VCC range? I willing to bet it's well below the maximum supplied by the board...maybe a phone call to the local office to talk with an engineer would be in order. If there's not a high potential for IC failure as a result of the out-of-range VCC then I'd have a hard time not recommending to others to max this setting as part of their routine for finding max FSB (not that I think max FSB is really that important anyway).

-FCG

[Praz]

I have a hard time believing 2.15V (which is the max on this board) isn't detrimental to the chip when default is 1.55V. Might be ok for short benching sessions though.

I'd like to know why it makes such a difference. It behaves like some type of driving strength adjustment for the cpu. The results achieved with the increased voltage is definitely processor dependent.

[Raja]

CPU PLL voltage is nothing more than VCC for the PLL chip that provides the reference frequency for the CPU FSB, PCI, etc. I'm not clear as to why this changes anything, although some people claim it gives them 2-5Mhz more just by maxing it out....go figure.

the over voltage in that case probably reduces clock jitter very slightly, 30-40mhz would sound about right for a slight jitter reduction.

Nominal volatge ranges for these types of devices used to be from 2.15-3.3v depending on part number..

Anyone got a part number there of the PLL chip so I can lookup the datasheet..?

regards
Raja

[eva2000]

not sure but Kevin/OPB's been saying for long term keep CPU PLL <1.7v

[Praz]

Loosening the Performance Level will allow a higher FSB with a lower PLL voltage. May have to increase NB and VTT voltage. This part seems processor dependent. For 24/7 it's going to be a balance of voltage and performance.

[Tony]

Thought I would add some info Jimmy at DFI was kind enough to forward to me. Kris could add this to a guide also if needed ;)

http://www.thetechrepository.com/attachment.php?attachmentid=599&stc=1&d=1188256604

http://www.thetechrepository.com/attachment.php?attachmentid=600&stc=1&d=1188256604

Over the next day or so i will explain what we have here and how to use the tables.

Big thanks to Jimmy at DFI here for the info.

EDIT 1 the top table.

This table pretty much shows what happens when you leave GTL's at auto and change VTT. All the time though GTL's will show at 110,
It is recommended you follow this table manually if you choose manual as this table closely follows Intels spec's

Next table shows what bios has as options for VTT and what is actually set.

The bottom tables show the relationship of VTT and GTL...An example is setting VTT to 1.2 and GTL to 115 will give 0.86V but with VTT at 1.5V 115 gives 1.05V

[Praz]

All voltages except processor and memory at default values.


http://www.fileden.com/files/2007/4/28/1027440/3d01.jpg

[Tony]

I really do feel the board is capable of 600+fsb the issue is the CPU's are not, kind of a shame really such a board is being held back.

The team at DFI did an awesome job though tuning this one and it will get the max from your CPU....:)

530FSB on default voltages is really kinda nice Praz

[Praz]

Early results do point to the cpu as being the limiting factor. Sub-zero cooling on the processor seems to be the way to reach 600+ FSB. Even then there appears to be some behind-the-scenes timing manipulation going on because the posted SuperP scores are lower then one would expect.

[c-n]

On this board increasing the PLL voltage helps with the processor FSB wall. As the wall is approached Windows freezes at the boot screen. The monitor appears blank but if the lights are turned off the Windows boot screen is just visible. Increasing PLL voltage not only allows Windows to boot but the system is stable. The downside is that not much is gained from the available voltage increase. With the processors I've tried so far there is at most 30MHz to 40MHZ gained from default to maximum PLL voltage.

Hi all

I just got my DFI LP P35 yesterday & after about 1 hour I had 525 x 7 3D stable with my E6600.

I can squeeze 530 x 7 out of her by playing with the pll & gtl's but if I get something wrong over 525 x 7 & it crashes or freezes I get a C1 error & have to swap out my OCZ PC2-8500 SLI's for a cheap stick of 512MB CL5 PC2-6400 to get the board to boot again.

I haven't found the blacking out screen Praz mentions above yet it either works or it don't for me or maybe I am trying to bully the board into more speed too quickly & missing the fine details warning of a wipe out.

What do you guys get when you push your board too far or are you all wise enough to notice small changes in your rigs behavior that tell you are close to the edge & back off to make adjustments which prevent a wipe out?

As much as I don't mind my usual way of going about things crash it till it works it appears you guys have a little more finesse so any advice you can offer to try to make my fail point less abrupt & catastrophic would be gratefully accepted.

CN

[Tony]

i have had the same issue in pushing the board and then having to swap memory, kinda weird we have to do this as from new I just put 2x150flex in after a cmos clear and it booted straight up.

I use memtest to see how close to the ragged edge i am, once it starts erroring bad i back off before a boot to the OS.

Like you I hit 525fsb conroe and 535fsb Allendale water cooled, any more would have me removing memory to get a boot.

[c-n]

i have had the same issue in pushing the board and then having to swap memory, kinda weird we have to do this as from new I just put 2x150flex in after a cmos clear and it booted straight up.

I use memtest to see how close to the ragged edge i am, once it starts erroring bad i back off before a boot to the OS.

Like you I hit 525fsb conroe and 535fsb Allendale water cooled, any more would have me removing memory to get a boot.

Thanks Tony I can live with the memory thing when over doing it as long as its not just me.

I have not been much of a fan of memtest since the NF4 days as just about very thing I done failed in windows after passing memtest but I will have another play tonight using memtest to see if I can find the fsb ragged edge easier than in windows.

[Praz]

Up to now I've been lucky with the board booting. The most I've had to do to get the board to boot is hold down the two on-board buttons while powering up. No switching of ram or hard CMOS clear. The screen going blank happens at FF, long after C1. I'm going to take a break from pushing the board for a couple of days to see what type of difference the Transpiper and plate make, if any. After that I'll put a quad core in.

[eva2000]

What Praz said you can use ez clear (page 48 of manual) or another method if you don't want to clear cmos but only reset FSB speed is to

1. power down system
2. hold HOME key on keyboard and hit power button with HOME key held .. this should boot you back to cpu default FSB but keep all settings intact instead of full clear cmos :)

also with 8/23 bios beware of 5:8 divider issues.. DFI is working on that right now :)

[c-n]

What Praz said you can use ez clear (page 48 of manual) or another method if you don't want to clear cmos but only reset FSB speed is to

1. power down system
2. hold HOME key on keyboard and hit power button with HOME key held .. this should boot you back to cpu default FSB but keep all settings intact instead of full clear cmos :)

also with 8/23 bios beware of 5:8 divider issues.. DFI is working on that right now :)

I did try EZ Clear then did a quick CMOS battery out & jumper shorted with PSU off but it wouldn't clear the C1 so I had to resort to swapping out the RAM.

Thanks for the FSB reset method very handy to know especially when a boot freezes just before letting you in CMOS this would sort it out.

My board came with 810 & after having the C1 issue I decided to try the latest official BIOS 823 to see if that would help but it is exactly the same for me.

What is the issue with 823 & the 5:8 divider ?

CN

[eva2000]

8/23 5:8 divider is set to a very tight strap for some reason even though it's meant to be 333FSB strap it's tighter than 266FSB strap so very low max ram clock overhead on 5:8 right now. I had similar prob on previous bios with 2:3 divider but 8/23 divider fixed 2:3 very nicely :)

2:3 divider with 2x1GB Crucial Ballistix Tracer PC2-8500 Micron D9GMH modules. DFI LP UT P35-T2R has very tight default performance level on 2:3 divider at Performance Level = 4! So be sure to have nice Micron D9xxx modules if you run Performance level = AUTO in bios ;)


500mhz 4-4-4-9 AUTO sub timings with AUTO Enhanced Data Transmit/Enhance Addressing at 2.15v bios
535mhz 4-4-4-9 AUTO sub timings with AUTO Enhanced Data Transmit/Enhance Addressing at 2.27v bios
558mhz 4-4-4-9 AUTO sub timings with AUTO Enhanced Data Transmit/Enhance Addressing at 2.38v bios
564mhz 4-4-4-9 AUTO sub timings with AUTO Enhanced Data Transmit/Enhance Addressing at 2.42v bios




@500Mhz 4-4-4-9 at 2.15v

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6850_L723A347_1/crucial/ballistix/8500t_2/9x/800/400-500_4449_AUTO-1.35-2.15-1.15-1.5-1.33-3.45-clk_cur134135/prime95_blend_load.png

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6850_L723A347_1/crucial/ballistix/8500t_2/9x/800/400-500_4449_AUTO-1.35-2.15-1.15-1.5-1.33-3.45-clk_cur134135/spi32m_15m56s593ms.png

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6850_L723A347_1/crucial/ballistix/8500t_2/9x/800/400-500_4449_AUTO-1.35-2.15-1.15-1.5-1.33-3.45-clk_cur134135/everest-bandwidth.png



@558Mhz 4-4-4-9 at 2.38v

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6850_L723A347_1/crucial/ballistix/8500t_2/9x/800/372-558_4449_AUTO-1.25-2.38-1.15-1.5-1.33-3.45-clk_cur1516/prime95_blend_load.png

Single 32M

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6850_L723A347_1/crucial/ballistix/8500t_2/9x/800/372-558_4449_AUTO-1.25-2.38-1.15-1.5-1.33-3.45-clk_cur1516/spi32m_14m09s937ms.png

Dual 32M half way

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6850_L723A347_1/crucial/ballistix/8500t_2/9x/800/372-558_4449_AUTO-1.25-2.38-1.15-1.5-1.33-3.45-clk_cur1516/spi32m_dual32m_halfway.png

Dual 32M complete

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6850_L723A347_1/crucial/ballistix/8500t_2/9x/800/372-558_4449_AUTO-1.25-2.38-1.15-1.5-1.33-3.45-clk_cur1516/spi32m_dual32m_tn.png (http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6850_L723A347_1/crucial/ballistix/8500t_2/9x/800/372-558_4449_AUTO-1.25-2.38-1.15-1.5-1.33-3.45-clk_cur1516/spi32m_dual32m.png)

Everest Ultimate 4.10.1076 beta vs 4.10.1108 beta

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6850_L723A347_1/crucial/ballistix/8500t_2/9x/800/372-558_4449_AUTO-1.25-2.38-1.15-1.5-1.33-3.45-clk_cur1516/everest_bandwidth_1076beta.png

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6850_L723A347_1/crucial/ballistix/8500t_2/9x/800/372-558_4449_AUTO-1.25-2.38-1.15-1.5-1.33-3.45-clk_cur1516/everest_bandwidth_1108beta.png


@564Mhz 4-4-4-9 at 2.42v

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6850_L723A347_1/crucial/ballistix/8500t_2/9x/800/376-564_4449_AUTO-1.28125-2.42-1.15-1.5-1.33-3.45-clk_cur1516/prime95_blend_load.png

Single 32M

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6850_L723A347_1/crucial/ballistix/8500t_2/9x/800/376-564_4449_AUTO-1.28125-2.42-1.15-1.5-1.33-3.45-clk_cur1516/spi32m_14m01s985ms.png

Dual 32M half way

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6850_L723A347_1/crucial/ballistix/8500t_2/9x/800/376-564_4449_AUTO-1.28125-2.42-1.15-1.5-1.33-3.45-clk_cur1516/spi32m_dual32m_halfway.png

Dual 32M complete

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6850_L723A347_1/crucial/ballistix/8500t_2/9x/800/376-564_4449_AUTO-1.28125-2.42-1.15-1.5-1.33-3.45-clk_cur1516/spi32m_dual32m_tn.png (http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6850_L723A347_1/crucial/ballistix/8500t_2/9x/800/376-564_4449_AUTO-1.28125-2.42-1.15-1.5-1.33-3.45-clk_cur1516/spi32m_dual32m.png)

Everest Ultimate

http://fileshosts.com/intel/DFI/DFI_P35T2R/results/scytheinfinity/E6850_L723A347_1/crucial/ballistix/8500t_2/9x/800/376-564_4449_AUTO-1.28125-2.42-1.15-1.5-1.33-3.45-clk_cur1516/everest-bandwidth.png

[c-n]

I'm going to take a break from pushing the board for a couple of days to see what type of difference the Transpiper and plate make, if any.

What was the outcome of the Transpiper & plate is it any good?

CN :)

[Praz]

Honestly that kind of got pushed away for a bit. I've been working with a couple of pieces of hardware for the last few days for a friend. Should have that wrapped up in the next day or two. Then I want to spend some time with a quadcore in the 965-P. So it might be another week, maybe a bit more.

On the subject of cooling you might find this of interest. In an email from Thermalright I was told the HR-09 Type3 MOSFET cooler should be available no later then the end of the month. As you're probably aware this cooler fits the DFI P35. I should have one before then and will post results.

[freecableguy]

Praz - put me in contact with Thermalright! I'm in Santa Clara, CA now so if they are in Silicon Valley they are probably just around the corner from me. Intel is less than 1 mile from me, so is Hynix, Micron, Broadcom, Creative, AMD, Nvidia, ATi, Auzentech....the list goes on and on and on....

Anyway, I would really love to test out their upcoming DFI P35 MOSFET cooler. I've already been able to stress the stock cooler to the point of instability with a G0 quad core at about 3.8-3.9GHz.

-Kris

[Raja]

MIPS should have a waterblock for this board soon too. The 680I LT had great benefit from water cooling of the PWM area using the MIPS block. The instability on the 6 phase design began around 3.6ghz or so and was very fsb related at equivalent cpu clocks with lower fsb's. Considering the heat that the PWM mosfets produce under hard load, I would be surprised if any air cooler can hold them down once they get past a certain point (in this case voltage and clocks equating to 3.8-3.9ghz for the P35), I hope that thermalright cooler is a beast.. Prime loads are hardcore, 3d benches etc, can usually be run a little higher for those on sub zero..

On the positive side 3.8-3.9ghz is well within the mass market requirements of this board.

I still think these Digital PWM's are not robust per device as conventional PWM circuits, they seem to need 2 extra devices in circuit to equal the regular switching designs, ie 8 phase digital is roughly equal to 6 phase conventional - in terms of load handling, if that.

regards
Raja

[c-n]

Honestly that kind of got pushed away for a bit. I've been working with a couple of pieces of hardware for the last few days for a friend. Should have that wrapped up in the next day or two. Then I want to spend some time with a quadcore in the 965-P. So it might be another week, maybe a bit more.

He He I know what you mean I find there are not enough hour in the day to play with my own stuff & theres only so much working through the night your body can handle before coffer fails to help.

Q: Are you hoping to be able to compare 965 & P35 quad results ?

On the subject of cooling you might find this of interest. In an email from Thermalright I was told the HR-09 Type3 MOSFET cooler should be available no later then the end of the month. As you're probably aware this cooler fits the DFI P35. I should have one before then and will post results.

Yes I am interested I will lookout for your findings/results.

FCG

I've already been able to stress the stock cooler to the point of instability with a G0 quad core at about 3.8-3.9GHz

Q: Interesting are you finding instability passively cooled & 3.8-3.9GHz ?

I found my PWM temps reach the late 60's early 70's under load which is about the same as the CPL chips early 60oC under load @ 3.8GHz passively cooled.

When I put a fan over the area the PWM & CPL chips temps drop down dramatically to the mid 40's & imo are very low certainly the lowest PWM temps of any board I have had recently which would suggest to me there is still plenty of head room.

CN :)

[Raja]

I tend not to always believe probe temps (these little devices can run hot, temps from heatsinks and off die probes are probably wide of the mark), though I would say 3.8ghz is more than adequate for 95% of this boards market. Impedance seems to suffer when the devices run over a certain temp. Only the extreme users will want more for benching..

I am one of the believers that the conventional mosfets are still the best way for quad core power demands, hence we see some of the adopters of digital pwm, reverting back...

regards
Raja

[Praz]

Kris

I sent you a pm.

John